A low-cost field re-configurable real-time GPS/INS integrated system – design and implementation

This paper describes the development of a real-time GPS/INS integrated system based on a field programmable gate array (FPGA) platform. The objective is to develop a generic hardware/software platform for positioning and imaging sensor integration. Compared with the application-specific integrated circuit (ASIC) approach, the FPGA approach can shorten the research and development (R&D) cycle. Its reprogrammable hardware provides a system design methodology of lower risk. It also allows maximum flexibility, being able to integrate a wide range of GPS and INS sensor packages. The hardware design is built on the Altera’s Nios II development kit. A time-sync universal asynchronous receiver/transmitter (UART) is implemented, which accesses a free-running clock counter and reads the count at the instant of start bit of a serial transmission. The count is then used to align the time of the INS data with the GPS time frame. The embedded software is implemented in a multi-thread configuration based on the Embedded Configurable Operating System (eCos). Four threads perform tasks that include; real-time decoding GPS and INS binary streams, time synchronisation, strapdown INS computation, and integration Kalman filtering. The system records the raw data and the solution onto a compact flash card for replay or postprocessing purposes. The real-time solution is also sent out through a serial port to a mobile device which can access the internet. As a result, the real-time solution can be visualised on GoogleEarth as well as monitored from a command centre. Preliminary tests demonstrate the feasibility of this type of system on the FPGA platform, and the functionality of the system including; the stability and accuracy of the time synchronisation mechanism, the performance of the hardware and software architecture, and the workability of the algorithm.